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  rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a 2.7 v, 800 m a, 80 mhz rail-to-rail i/o amplifiers connection diagrams ad8031/ad8032 features low power supply current 800 m a/amplifier fully specified at +2.7 v, +5 v and 6 5 v supplies high speed and fast settling on +5 v 80 mhz C3 db bandwidth (g = +1) 30 v/ m s slew rate 125 ns settling time to 0.1% rail-to-rail input and output no phase reversal with input 0.5 v beyond supplies input cmvr extends beyond rails by 200 mv output swing to within 20 mv of either rail low distortion C62 db @ 1 mhz, v o = 2 v p-p C86 db @ 100 khz, v o = 4.6 v p-p output current: 15 ma high grade option v os (max) = 1.5 mv applications high-speed battery-operated systems high component density systems portable test instruments a/d buffer active filters high-speed set-and-demand amplifier one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 1999 8-lead plastic dip (n), soic (r) and m soic (rm) packages 1 2 3 4 8 7 6 5 ad8032 out1 Cin1 +in1 Cv s +in2 Cin2 +v s out2 8-lead plastic dip (n) and soic (r) packages 1 2 3 4 8 7 6 5 ad8031 nc Cin +in Cv s nc = no connect nc out +v s nc 5-lead plastic surface mount package sot-23-5 (rt-5) +in +v s Cv s ad8031 1 2 3 5 4 Cin v out (not to scale) general description the ad8031 (single) and ad8032 (dual) single supply voltage feedback amplifiers feature high-speed performance with 80 mhz of small signal bandwidth, 30 v/ m s slew rate and 125 ns settling time. this performance is possible while consuming less than 4.0 mw of power from a single +5 v supply. these features increase the operation time of high speed battery-powered systems without compromising dynamic performance. the products have true single supply capability with rail-to-rail input and output characteristics and are specified for +2.7 v, +5 v and 5 v supplies. the input voltage range can extend to 500 mv beyond each rail. the output voltage swings to within 20 mv of each rail providing the maximum output dynamic range. the ad8031/ad8032 also offer exc ellent signal quality for only 800 m a of supply current per amplifier; thd is C62 dbc with a 2 v p-p, 1 mhz output signal and C86 dbc for a 100 khz, 4.6 v p-p signal on +5 v supply. the low distortion and fast settling time make them ideal as buffers to single supply, a-to-d converters. operating on supplies from +2.7 v to +12 v and dual supplies up to 6 v, the ad8031/ad8032 are ideal for a wide range of applications, from battery-operated systems with large bandwidth requirements to high-speed systems where component density requires lower power dissipation. the ad8031/ad8032 are available in 8-lead plastic dip and soic packages and will operate over the indus- trial temperature range of C40 c to +85 c. the ad8031a is also available in the space-saving 5-lead sot-23-5 package and the ad8032a is available in an 8-lead m soic package. 2 m s/div 1v/div 1v/div 2 m s/div v in +5v 1k v 1.7pf +2.5v v out circuit diagram figure 1. rail-to-rail performance at 100 khz input v in output v out
rev. b C2C ad8031/ad8032Cspecifications ad8031a/ad8032a ad8031b/ad8032b parameter conditions min typ max min typ max units dynamic performance C3 db small signal bandwidth g = +1, v o < 0.4 v p-p 54 80 54 80 mhz slew rate g = C1, v o = 2 v step 25 30 25 30 v/ m s settling time to 0.1% g = C1, v o = 2 v step, c l = 10 pf 125 125 ns distortion/noise performance total harmonic distortion f c = 1 mhz, v o = 2 v p-p, g = +2 C62 C62 dbc f c = 100 khz, v o = 2 v p-p, g = +2 C86 C86 dbc input voltage noise f = 1 khz 15 15 nv/ ? hz input current noise f = 100 khz 2.4 2.4 pa/ ? hz f = 1 khz 5 5 pa/ ? hz crosstalk (ad8032 only) f = 5 mhz C60 C60 db dc performance input offset voltage v cm = v cc 2 ; v out = 1.35 v 1 6 0.5 1.5 mv t min to t max 6 10 1.6 2.5 mv offset drift v cm = v cc 2 ; v out = 1.35 v 10 10 m v/ c input bias current v cm = v cc 2 ; v out = 1.35 v 0.45 2 0.45 2 m a t min to t max 2.2 2.2 m a input offset current 50 500 50 500 na open loop gain v cm = v cc 2 ; v out = 0.35 v to 2.35 v 76 80 76 80 db t min to t max 74 74 db input characteristics common-mode input resistance 40 40 m w differential input resistance 280 280 k w input capacitance 1.6 1.6 pf input voltage range C0.5 to C0.5 to +3.2 +3.2 v input common-mode voltage range C0.2 to C0.2 to +2.9 +2.9 v common-mode rejection ratio v cm = 0 v to 2.7 v 46 64 46 64 db v cm = 0 v to 1.55 v 58 74 58 74 db differential input voltage 3.4 3.4 v output characteristics output voltage swing low r l = 10 k w +0.05 +0.02 +0.05 +0.02 v output voltage swing high +2.6 + 2.68 +2.6 +2.68 v output voltage swing low r l = 1 k w +0.15 +0.08 +0.15 +0.08 v output voltage swing high +2.55 +2.6 +2.55 +2.6 v output current 15 15 ma short circuit current sourcing 21 21 ma sinking C34 C34 ma capacitive load drive g = +2 (see figure 41) 15 15 pf power supply operating range +2.7 +12 +2.7 +12 v quiescent current per amplifier 750 1250 750 1250 m a power supply rejection ratio v s C = 0 v to C1 v or v s + = +2.7 v to +3.7 v 75 86 75 86 db specifications subject to change without notice. (@ t a = +25 8 c, v s = +2.7 v, r l = 1 k v to +1.35 v, r f = 2.5 k v unless otherwise noted) +2.7 v supply
ad8031/ad8032 C3C rev. b specifications ad8031a/ad8032a ad8031b/ad8032b parameter conditions min typ max min typ max units dynamic performance C3 db small signal bandwidth g = +1, v o < 0.4 v p-p 54 80 54 80 mhz slew rate g = C1, v o = 2 v step 27 32 27 32 v/ m s settling time to 0.1% g = C1, v o = 2 v step, c l = 10 pf 125 125 ns distortion/noise performance total harmonic distortion f c = 1 mhz, v o = 2 v p-p, g = +2 C62 C62 dbc f c = 100 khz, v o = 2 v p-p, g = +2 C86 C86 dbc input voltage noise f = 1 khz 15 15 nv/ ? hz input current noise f = 100 khz 2.4 2.4 pa/ ? hz f = 1 khz 5 5 pa/ ? hz differential gain r l = 1 k w 0.17 0.17 % differential phase r l = 1 k w 0.11 0.11 degrees crosstalk (ad8032 only) f = 5 mhz C60 C60 db dc performance input offset voltage v cm = v cc 2 ; v out = 2.5 v 1 6 0.5 1.5 mv t min to t max 6 10 1.6 2.5 mv offset drift v cm = v cc 2 ; v out = 2.5 v 5 5 m v/ c input bias current v cm = v cc 2 ; v out = 2.5 v 0.45 1.2 0.45 1.2 m a t min to t max 2.0 2.0 m a input offset current 50 350 50 250 na open loop gain v cm = v cc 2 ; v out = 1.5 v to 3.5 v 76 82 76 82 db t min to t max 74 74 db input characteristics common-mode input resistance 40 40 m w differential input resistance 280 280 k w input capacitance 1.6 1.6 pf input voltage range C0.5 to C0.5 to +5.5 +5.5 v input common-mode voltage range C0.2 to C0.2 to +5.2 +5.2 v common-mode rejection ratio v cm = 0 v to 5 v 56 70 56 70 db v cm = 0 v to 3.8 v 66 80 66 80 db differential input voltage 3.4 3.4 v output characteristics output voltage swing low r l = 10 k w +0.05 +0.02 +0.05 +0.02 v output voltage swing high + 4.95 +4.98 +4.95 +4.98 v output voltage swing low r l = 1 k w +0.2 +0.1 +0.2 +0.1 v output voltage swing high +4.8 +4.9 +4.8 +4.9 v output current 15 15 ma short circuit current sourcing 28 28 ma sinking C46 C46 ma capacitive load drive g = +2 (see figure 41) 15 15 pf power supply operating range +2.7 +12 +2.7 +12 v quiescent current per amplifier 800 1400 800 1400 m a power supply rejection ratio v s C = 0 v to C1 v or v s + = +5 v to +6 v 75 86 75 86 db specifications subject to change without notice. +5 v supply (@ t a = +25 8 c, v s = +5 v, r l = 1 k v to +2.5 v, r f = 2.5 k v unless otherwise noted)
C4C rev. b ad8031a/ad8032a ad8031b/ad8032b parameter conditions min typ max min typ max units dynamic performance C3 db small signal bandwidth g = +1, v o < 0.4 v p-p 54 80 54 80 mhz slew rate g = C1, v o = 2 v step 30 35 30 35 v/ m s settling time to 0.1% g = C1, v o = 2 v step, c l = 10 pf 125 125 ns distortion/noise performance total harmonic distortion f c = 1 mhz, v o = 2 v p-p, g = +2 C62 C62 dbc f c = 100 khz, v o = 2 v p-p, g = +2 C86 C86 dbc input voltage noise f = 1 khz 15 15 nv/ ? hz input current noise f = 100 khz 2.4 2.4 pa/ ? hz f = 1 khz 5 5 pa/ ? hz differential gain r l = 1 k w 0.15 0.15 % differential phase r l = 1 k w 0.15 0.15 degrees crosstalk (ad8032 only) f = 5 mhz C60 C60 db dc performance input offset voltage v cm = 0 v; v out = 0 v 1 6 0.5 1.5 mv t min to t max 6 10 1.6 2.5 mv offset drift v cm = 0 v; v out = 0 v 5 5 m v/ c input bias current v cm = 0 v; v out = 0 v 0.45 1.2 0.45 1.2 m a t min to t max 2.0 2.0 m a input offset current 50 350 50 250 na open loop gain v cm = 0 v; v out = 2 v 76 80 76 80 db t min to t max 74 74 db input characteristics common-mode input resistance 40 40 m w differential input resistance 280 280 k w input capacitance 1.6 1.6 pf input voltage range C5.5 to C5.5 to +5.5 +5.5 v input common-mode voltage range C5.2 to C5.2 to +5.2 +5.2 v common-mode rejection ratio v cm = C5 v to +5 v 60 80 60 80 db v cm = C5 v to +3.5 v 66 90 66 90 db differential/input voltage 3.4 3.4 v output characteristics output voltage swing low r l = 10 k w C4.94 C4.98 C4.94 C4.98 v output voltage swing high + 4.94 +4.98 +4.94 +4.98 v output voltage swing low r l = 1 k w C4.7 C4.85 C4.7 C4.85 v output voltage swing high +4.7 +4.75 +4.7 +4.75 v output current 15 15 ma short circuit current sourcing 35 35 ma sinking C50 C50 ma capacitive load drive g = +2 (see figure 41) 15 15 pf power supply operating range 1.35 6 1.35 6v quiescent current per amplifier 900 1600 900 1600 m a power supply rejection ratio v s C = C5 v to C6 v or v s + = +5 v to +6 v 76 86 76 86 db specifications subject to change without notice. ad8031/ad8032Cspecifications (@ t a = +25 8 c, v s = 6 5 v, r l = 1 k v to 0 v, r f = 2.5 k v unless otherwise noted) 6 5 v supply
ad8031/ad8032 C5C rev. b ordering guide temperature package package brand model range descriptions options code ad8031an C40 c to +85 c 8-lead plastic dip n-8 ad8031ar C40 c to +85 c 8-lead soic so-8 ad8031ar-reel C40 c to +85 c 13" tape and reel so-8 ad8031ar-reel7 C40 c to +85 c 7" tape and reel so-8 AD8031ART-reel C40 c to +85 c 13" tape and reel rt-5 h0a AD8031ART-reel7 C40 c to +85 c 7" tape and reel rt-5 h0a ad8031bn C40 c to +85 c 8-lead plastic dip n-8 ad8031br C40 c to +85 c 8-lead soic so-8 ad8031br-reel C40 c to +85 c 13" tape and reel so-8 ad8031br-reel7 C40 c to +85 c 7" tape and reel so-8 ad8032an C40 c to +85 c 8-lead plastic dip n-8 ad8032ar C40 c to +85 c 8-lead soic so-8 ad8032ar-reel C40 c to +85 c 13" tape and reel so-8 ad8032ar-reel7 C40 c to +85 c 7" tape and reel so-8 ad8032arm C40 c to +85 c 8-lead m soic rm-8 h9a ad8032arm-reel C40 c to +85 c 13" tape and reel rm-8 h9a ad8032arm-reel7 C40 c to +85 c 7" tape and reel rm-8 h9a ad8032bn C40 c to +85 c 8-lead plastic dip n-8 ad8032br C40 c to +85 c 8-lead soic so-8 ad8032br-reel C40 c to +85 c 13" tape and reel so-8 ad8032br-reel7 C40 c to +85 c 7" tape and reel so-8 absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +12.6 v internal power dissipation 2 plastic dip package (n) . . . . . . . . . . . . . . . . . . . 1.3 watts small outline package (r) . . . . . . . . . . . . . . . . . . 0.8 watts m soic (rm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 watts sot-23-5 (rt) . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 watts input voltage (common-mode) . . . . . . . . . . . . . v s 0.5 v differential input voltage . . . . . . . . . . . . . . . . . . . . . . . 3.4 v output short circuit duration . . . . . . . . . . . . . . . . . . . . . . observe power derating curves storage temperature range (n, r, rm, rt) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C65 c to +125 c lead temperature range (soldering 10 sec) . . . . . . . . +300 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 specification is for the device in free air: 8-lead plastic dip package: q ja = 90 c/w. 8-lead soic package: q ja = 155 c/w. 8-lead m soic package: q ja = 200 c/w. 5-lead sot-23-5 package: q ja = 240 c/w. maximum power dissipation the maximum power that can be safely dissipated by the ad8031/ad8032 are limited by the associated rise in junction temperature. the maximum safe junction temperature for plas- tic encapsulated de vices is determined by the glass transition temperature of the plastic, approximately +150 c. exceeding this limit temporarily may cause a shift in param etric perfor- mance due to a change in the stresses exerted on the die by the package. exceeding a junction temperature of +175 c for an extended period can result in device failure. while the ad8031/ad8032 are internally short circuit pro- tected, this may not be sufficient to guarantee that the maxi- mum junction temperature (+150 c) is not exceeded under all conditions. to ensure proper operation, it is necessary to observe the maximum power dera ting curves shown in figure 2. ambient temperature C 8 c 2.0 1.5 0 C50 80 C40 maximum power dissipation C watts C30 C20 C10 0 10 20 30 40 50 60 70 1.0 0.5 90 t j = +150 8 c 8-lead soic package 8-lead m soic sot-23-5 8-lead plastic dip package figure 2. maximum power dissipation vs. temperature caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad8031/ad8032 feature proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of f unctionality. warning! esd sensitive device
ad8031/ad8032Ctypical performance characteristics C6C rev. b v os ?mv ? ? ? ? ? 0 1 2 3 4 5 90 80 0 number of parts in bin 40 30 20 10 60 50 70 n = 250 figure 3. typical v os distribution @ v s = 5 v temperature C 8 c 2.5 2.3 1.5 C40 90 C30 offset voltage C mv C20C100 10203040506070 80 2.1 1.9 1.7 v s = +5v v s = 6 5v figure 4. input offset voltage vs. temperature temperature C 8 c 1 0.65 0.5 C40 90 C30 input bias C m a C20C100 1020 3040506070 80 0.95 0.7 0.6 0.55 0.85 0.75 0.9 0.8 v s = +5v figure 5. input bias current vs. temperature common-mode voltage ?v 800 ?00 010 1 input bias current ?na 23 45 67 89 v s = +2.7v 600 400 200 0 ?00 ?00 ?00 v s = +5v v s = +10v figure 6. input bias current vs. common-mode voltage offset voltage ?mv common-mode voltage ?v 0 ?.3 ?.6 05 0.5 1 1.5 2 2.5 3 3.5 4 4.5 ?.1 ?.2 ?.4 ?.5 v s = +5v figure 7. v os vs. common-mode voltage temperature C 8 c supply current/amplifier C m a 1000 750 600 C40 90 C30 C20 C10 0 10 20 30 40 50 60 70 80 950 800 700 650 900 850 6 i s , v s = 6 5v +i s , v s = +5v +i s , v s = +2.7v figure 8. supply current vs. temperature
ad8031/ad8032 C7C rev. b r load ?ohms 0 ?.5 ?.5 100 10k 1k difference from v cc ?volts ? ?.5 ? v cc v ee v in r load v out v cc 2 v cc = +2.7v v cc = +10v v cc = +5v figure 9. +output saturation voltage vs. r load @ +85 c r load ?ohms 0 ?.5 ?.5 100 10k 1k difference from v cc ?volts ? ?.5 ? v cc v ee v in r load v out v cc 2 v cc = +2.7v v cc = +10v v cc = +5v figure 10. +output saturation voltage vs. r load @ +25 c r load ?ohms 0 ?.5 ?.5 100 10k 1k difference from v cc ?volts ? ?.5 ? v cc v ee v in r load v out v cc 2 v cc = +2.7v v cc = +10v v cc = +5v figure 11. +output saturation voltage vs. r load @ C40 c 1.2 1 0 difference from v ee ?volts 100 10k 1k 0.6 0.4 0.2 0.8 r load ?ohms v cc v ee v in r load v out v cc 2 v cc = +2.7v v cc = +10v v cc = +5v figure 12. ?utput saturation voltage vs. r load @ +85 c 1.2 1 0 100 10k 1k 0.6 0.4 0.2 0.8 r load ?ohms difference from v cc ?volts v cc v ee v in r load v out v cc 2 v cc = +2.7v v cc = +10v v cc = +5v figure 13. ?utput saturation voltage vs. r load @ +25 c 1.2 1 0 difference from v ee ?volts 100 10k 1k 0.6 0.4 0.2 0.8 r load ?ohms v cc v ee v in r load v out v cc 2 v cc = +2.7v v cc = +10v v cc = +5v figure 14. ?utput saturation voltage vs. r load @ ?0 c
ad8031/ad8032Ctypical performance characteristics C8C rev. b r load ?ohms 110 105 60 0 10k 2k 4k 6k 8k 90 75 70 65 100 95 80 85 gain ?db v s = +5v ? ol +a ol figure 15. open-loop gain (a ol ) vs. r load temperature C 8 c 86 84 76 C40 90 C30 C20 C10 0 10 20 30 40 50 60 70 80 82 80 78 gain C db v s = +5v r l = 1k v Ca ol +a ol figure 16. open-loop gain (a ol ) vs. temperature v out C v a ol C db 110 80 50 05 0.5 1 1.5 2 2.5 3 3.5 4 4.5 100 90 70 60 v s = +5v r load = 10k v r load = 1k v figure 17. open-loop gain (a ol ) vs. v out 10 0% 100 90 1v 500mv v s = +5v 500mv 10 0 ?0 ?.5 0.5 2.5 4.5 6.5 input voltage ?volts input bias current ?ma figure 18. differential input overvoltage i-v characteristics 0.05 diff gain ?% ?.15 ?.05 ?.10 0.00 11th 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 0.10 diff phase ?degrees ?.10 0.00 ?.05 0.05 figure 19. differential gain and phase @ v s = 5 v; r l = 1 k v frequency C hz 100 30 0.3 10 10m 100 1k 10k 100k 1m 10 3 1 v s = +5v input voltage noise C nv/ hz voltage noise current noise 100 10 1 0.1 input current noise C pa/ hz figure 20. input voltage noise vs. frequency
ad8031/ad8032 C9C rev. b frequency C mhz 0.1 100 normalized gain C db 110 5 4 C5 3 2 1 0 C1 C2 C3 C4 v s = +5v g = +1 r l = 1k v figure 21. unity gain , C3 db bandwidth frequency C mhz 0.1 100 normalized gain C db 110 C5 3 2 1 0 C1 C2 C3 C4 v s = +5v v in = C16dbm +85 8 c C40 8 c +25 8 c v s v in v out 50 v 2k v figure 22. closed-loop gain vs. temperature frequency C hz 100k 100m closed-loop gain C db 1m 10m C8 2 1 0 C1 C4 C5 C6 C7 v s = 6 5v C2 C3 g = +1 c l = 5pf r l = 1k v v s = +2.7v r l + c l to 1.35v v s = +5v r l + c l to 2.5v figure 23. closed-loop gain vs. supply voltage frequency C mhz 0.3 100 phase C degree 110 C20 30 20 10 0 C10 40 C90 C135 C180 C225 phase gain open-loop gain C db figure 24. open-loop frequency response fundamental frequency C hz 1k 10m total harmonic distortion C dbc 100k 1m C80 C20 C30 C40 C50 C60 C70 2.5v p-p v s = +2.7v 10k g = +1, r l = 2k v to v cc 2 4.8v p-p v s = +5v 2v p-p v s = +2.7v 1.3v p-p v s = +2.7v figure 25. total harmonic distortion vs. frequency; g = +1 fundamental frequency C hz 1k 10m total harmonic distortion C dbc 100k 1m C80 C20 C30 C40 C50 C60 C70 4.6v p-p 10k 4v p-p g = +2 v s = +5v r l = 1k v to v cc 2 C90 1v p-p 4.8v p-p figure 26. total harmonic distortion vs. frequency; g = +2
C10C rev. b ad8031/ad8032Ctypical performance characteristics frequency C hz 1k 10m 100k 1m 0 10 8 6 4 2 v s = 6 5v 10k v s = +5v v s = +2.7v output C v p-p figure 27. large signal response frequency C mhz 0.1 100 r out C v 110 100 50 10 1 0.1 rb t = 50 v 200 rb t = 0 v out rb t figure 28. r out vs. frequency v s = +5v frequency C hz 100k common-mode rejection ratio C db 1k 10k 0 C40 C60 C80 1m C20 100 10m C100 figure 29. cmrr vs. frequency v s = +5v frequency C hz 100k power supply rejection ratio C db 1k 10k 0 C40 C60 C80 C100 1m C20 100 10m C120 100m figure 30. psrr vs. frequency 10 m s / div v s = +5v r l = 10k v to 2.5v 5.5 4.5 3.5 1.5 0.5 C0.5 1v / div 2.5 v in = 6v p-p g = +1 figure 31. output voltage 10 m s / div v s = +5v g = +1 input = 650mv beyond rails 5.5 4.5 3.5 1.5 0.5 1v / div 2.5 input C0.5 figure 32. output voltage phase reversal behavior
ad8031/ad8032 C11C rev. b 10 m s / div v s = +5v r l = 1k v g = C1 500mv/div 0 r l to +2.5v r l to gnd figure 33. output swing 50ns/div g = +2 r f = r g = 2.5k v r l = 2k v c l = 5pf v s = +5v 3.1 2.9 2.7 2.3 2.1 1.9 200mv/div 2.5 figure 34. 1 v step response 10 m s / div v s = +2.7v r l = 1k v g = C1 2.85 2.35 1.85 0.85 0.35 1.35 r l to gnd r l to 1.35v 500mv/div figure 35. output swing 50ns / div g = +1 r f = 0 r l = 2k v to 2.5v c l = 5pf to 2.5v v s = +5v 2.56 2.54 2.52 2.48 2.46 2.44 2.50 20mv/div figure 36. 100 mv step response frequency C mhz 0.1 100 crosstalk C db 110 C50 C60 C70 C100 200 50 v 1k v 2.5k v 2.5k v v in transmitter v out 50 v 2.5k v 2.5k v receiver C80 C90 v s = 6 2.5v v in = +10dbm figure 37. crosstalk vs. frequency
ad8031/ad8032 C12C rev. b theory of operation the ad8031/ad8032 are single and dual versions of high speed, low power voltage feedback amplifiers featuring an inno- vative architecture that maximizes the dynamic range capability on the inputs and outputs. linear input common-mode range exceeds either supply voltage by 200 mv, and the amplifiers show no phase reversal up to 500 mv beyond supply. the out- put swings to within 20 mv of either supply when driving a light load; 300 mv w hen driving up to 5 ma. fabricated on analog devices xfcb, a 4 ghz dielectrically isolated fully complementary bipolar process, the amplifier provides an impressive 80 mhz bandwidth when used as a follower and 30 v/ m s slew rate at only 800 m a supply current. careful design allows the amplifier to operate with a supply voltage as low as 2.7 volts. input stage operation a simplified schematic of the input stage appears in figure 38. for common-mode voltages up to 1.1 volts within the positive supply, (0 v to 3.9 v on a single 5 v supply) tail current i2 flows through the pnp differential pair, q13 and q17. q5 is cut off; no bias current is routed to the parallel npn differential pair q2 and q3. as the common-mode voltage is driven within 1.1 v of the positive supply, q5 turns on and routes the tail current away from the pnp pair and to the npn pair. during this transition region, the amplifiers input current will change magnitude and direction. reusing the same tail current ensures that the input stage has the same transconductance (which deter- mines the amplifiers gain and bandwidth) in both regions of operation. switching to the npn pair as the common-mode voltage is driven beyond 1 v within the positive supply allows the ampli- fier to provide useful operation for signals at either end of the supply voltage range and eliminates the possibility of phase reversal for input signals up to 500 mv beyond either power supply. offset voltage will also change to reflect the offset of the input pair in control. the transition region is small, on the order of 180 mv. these sudden changes in the dc parameters of the input stage can produce glitches that will adversely affect distortion. overdriving the input stage sustained input differential voltages greater than 3.4 volts should be avoided as the input transistors may be damaged. input clamp diodes are recommended if the possibility of this condition exists. the volt ages at the collectors of the input pairs are set to 200 mv from the power supply rails. this allows the amplifier to remain in linear operation for input voltages up to 500 mv beyond the supply voltages. driving the input common-mode voltage be- yond that point will forward bias the collector junction of the input transistor, resulting in phase reversal. sustaining this condition for any length of time should be avoided as it is easy to exceed the maximum allowed input differential voltage when the amplifier is in phase reversal. q3 r8 850 v r9 850 v q2 q13 r6 850 v r7 850 v q17 q6 q8 q10 4 i4 25 m a q14 4 1 1 q7 q15 1 q11 4 1 4 q16 q18 q4 r4 2k v r3 2k v r1 2k v r2 2k v i3 25 m a i2 90 m a v cc v in v ip q5 q9 r5 50k v i1 5 m a v ee output stage, common-mode feedback 1.1v figure 38. simplified schematic of ad8031 input stage
ad8031/ad8032 C13C rev. b output overdrive recovery output overdrive of an amplifier occurs when the amplifier attempts to drive the output voltage to a level outside its normal range. after the overdrive condition is removed, the amplifier must recover to normal operation in a reasonable amount of time. as shown in figure 40, the ad8031/ad8032 recover within 100 ns from negative overdrive and within 80 ns from positive overdrive. v s = 6 2.5v v in = 6 2.5v r l = +1k v to gnd 100ns 1v r f = r g = 2k v v out r f 50 v r g v in r l figure 40. overdrive recovery driving capacitive loads capacitive loads interact with an op amps output impedance to create an extra delay in the feedback path. this reduces circuit stability, and can cause unwanted ringing and oscillation. a given value of capacitance causes much less ringing when the amplifier is used with a higher noise gain. the capacitive load drive of the ad8031/ad8032 can be in- creased by adding a low valued resistor in series with the capaci- tive load. introducing a series resistor tends to isolate the capacitive load from the feedback loop, thereby, diminishing its influence. figure 41 shows the effects of a series resistor on capacitive drive for varying voltage gains. as the closed-loop gain is increased, the larger phase margin allows for larger ca- pacitive loads with less overshoot. adding a series resistor at lower closed-loop gains accomplishes the same effect. for large capacitive loads, the frequency response of the amplifier will be dominated by the roll-off of the series resistor and capacitive load. 1000 10 100 01 4 capacitive load C pf closed-loop gain C v/v 23 r g c l r f v out v s = +5v 200mv step with 30% overshoot r s = 20 v r s = 0 v , 5 v 1 5 r s = 20 v r s r s = 0 v r s = 5 v figure 41. capacitive load drive vs. closed-loop gain output stage, open-loop gain and distortion vs. clearance from power supply the ad8031 features a rail-to-rail output stage. the output transistors operate as common emitter amplifiers, providing the output drive current as well as a large portion of the amplifiers open-loop gain. q37 r29 300 v q47 q21 q20 q51 q27 q68 q44 q42 q48 q49 q50 q43 c5 1.5pf i4 25 m a v out q38 i1 25 m a differential drive from input stage i5 25 m a i2 25 m a c9 5pf figure 39. output stage simplified schematic the output voltage limit depends on how much current the output transistors are required to source or sink. for applica- tions with very low drive requirements (a unity gain follower driving another amplifier input, for instance), the ad8031 typi- cally swings within 20 mv of either voltage supply. as the re- quired current load increases, the saturation output voltage will increase linearly as i load r c , where i load is the required load current and r c is the output transistor collector resistance. for the ad8031, the collector resistances for both output transistors are typically 25 w . as the current load exceeds the rated output current of 15 ma, the amount of base drive current required to drive the output transistor into saturation will reach its limit, and the amplifiers output swing will rapidly decrease. the open-loop gain of the ad8031 decreases approximately linearly with load resistance and also depends on the output voltage. open-loop gain stays constant to within 250 mv of the positive power supply, 150 mv of the negative power supply and then decreases as the output transistors are driven further into saturation. the distortion performance of the ad8031/ad8032 amplifiers differs from conventional amplifiers. typically an amplifiers distortion performance degrades as the output voltage ampli- tude increases. used as a unity gain follower, the ad8031/ad8032 output will exhibit more distortion in the peak output voltage region around v cc C0.7 v. this unusual distortion characteristic is caused by the input stage architecture and is discussed in detail in the section covering input stage operation.
ad8031/ad8032 C14C rev. b applications a 2 mhz single supply biquad bandpass filter figure 42 shows a circuit for a single supply biquad bandpass filter with a center frequency of 2 mhz. a 2.5 v bias level is easily created by connecting the noninverting inputs of all three op amps to a resistor divider consisting of two 1 k w resistors connected between +5 v and ground. this bias point is also decoupled to ground with a 0.1 m f capacitor. the frequency response of the filter is shown in figure 43. in order to maintain an accurate center frequency, it is essential that the op amp has sufficient loop gain at 2 mhz. this requires the choice of an op amp with a significantly higher unity gain crossover frequency. the unity gain crossover frequency of the ad8031/ad8032 is 40 mhz. multiplying the open-loop gain by the feedback factors of the individual op amp circuits yields the loop gain for each gain stage. from the feedback networks of the individual op amp circuits, we can see that each op amp has a loop gain of at least 21 db. this level is high enough to ensure that the center frequency of the filter is not affected by the op amps bandwidth. if, for example, an op amp with a gain band- width product of 10 mhz was chosen in this application, the resulting center frequency would shift by 20% to 1.6 mhz. +5v 0.1 m f 0.1 m f v in r2 2k v 1k v 1k v ad8031 c1 50pf r1 3k v r3 2k v +5v 0.1 m f r4 2k v 1/2 ad8032 r5 2k v v out 1/2 ad8032 c2 50pf r6 1k v figure 42. a 2 mhz biquad bandpass filter using ad8031/ ad8032 1m frequency ?hz 10k 100m gain ?db 100k 10m ?0 0 ?0 ?0 ?0 ?0 figure 43. frequency response of 2 mhz bandpass filter high performance single supply line driver even though the ad8031/ad8032 swing close to both rails, the ad8031 has optimum distortion performance when the signal has a common-mode level half way between the supplies and when there is about 500 mv of headroom to each rail. if low distortion is required in single supply applications for sig- nals that swing close to ground, an emitter follower circuit can be used at the op amp output. +5v 0.1 m f 7 3 2 2n3904 200 v v out 6 2.49k v 49.9 v 4 10 m f ad8031 v in 2.49k v 49.9 v 49.9 v figure 44. low distortion line driver for single supply ground referenced signals
ad8031/ad8032 C15C rev. b figure 44 shows the ad8031 configured as a single supply gain- of-2 line driver. with the output driving a back terminated 50 w line, the overall gain from v in to v out is unity. in addition to minimizing reflections, the 50 w back termination resistor pro- tects the transistor from damage if the cable is short circuited. the emitter follower, which is inside the feedback loop, ensures that the output voltage from the ad8031 stays about 700 mv above ground. using this circuit, very low distortion is attain- able even when the output signal swings to within 50 mv of ground. the circuit was tested at 500 khz and 2 mhz. figures 45 and 46 show the output signal swing and frequency spectrum at 500 khz. at this frequency, the output signal (at v out ), which has a peak-to-peak swing of 1.95 v (50 mv to 2 v), has a thd of C68 db (sfdr = C77 db). 2v 50mv 10 0% 100 90 1 m s 0.5v figure 45. output signal swing of low distortion line driver at 500 khz stop 5mhz vertical scale ?10db/div start 0hz +9dbm figure 46. thd of low distortion line driver at 500 khz figures 47 and 48 show the output signal swing and frequency spectrum at 2 mhz. as expected, there is some degradation in signal quality at the higher frequency. when the output signal has a peak-to-peak swing of 1.45 v (swinging from 50 mv to 1.5 v), the thd is C55 db (sfdr = C60 db). this circuit could also be used to drive the analog input of a single supply high speed adc whose input voltage range is referenced to ground (e.g., 0 v to 2 v or 0 v to 4 v). in this case, a back termination resistor is not necessary (assuming a short p hysical distance from transistor to adc), so the emit- ter of the external transistor would be connected directly to the adc input. the available output voltage swing of the circuit would, therefore be doubled. 50mv 10 0% 100 90 200ns 0.2v 1.5v figure 47. output signal swing of low distortion line driver at 2 mhz start 0hz stop 20mhz vertical scale ?10db/div +7dbm figure 48. thd of low distortion line driver at 2 mhz
ad8031/ad8032 C16C rev. b c2152bC0C9/99 printed in u.s.a. 8-lead plastic dip (n-8) 8 14 5 pin 1 0.39 (9.91) max 0.25 (6.35) 0.31 (7.87) seating plane 0.125 (3.18) min 0.10 (2.54) bsc 0.033 (0.84) nom 0.165 0.01 (4.19 0.25) 0.018 0.003 (0.46 0.08) 0.035 0.01 (0.89 0.25) 0.18 0.03 (4.57 0.76) 0.011 0.003 (0.28 0.08) 15 0 0.30 (7.62) ref outline dimensions dimensions shown in inches and (mm). 8-lead plastic soic (so-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 4 1 0.2440 (6.20) 0.2284 (5.80) pin 1 0.1574 (4.00) 0.1497 (3.80) 0.0688 (1.75) 0.0532 (1.35) seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45 8-lead m soic (rm-8) 8 5 4 1 0.122 (3.10) 0.114 (2.90) 0.199 (5.05) 0.187 (4.75) pin 1 0.0256 (0.65) bsc 0.122 (3.10) 0.114 (2.90) seating plane 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) 0.008 (0.20) 0.043 (1.09) 0.037 (0.94) 0.120 (3.05) 0.112 (2.84) 0.011 (0.28) 0.003 (0.08) 0.028 (0.71) 0.016 (0.41) 33 27 0.120 (3.05) 0.112 (2.84) 5-lead plastic surface mount (sot-23) (rt-5) 0.1181 (3.00) 0.1102 (2.80) pin 1 0.0669 (1.70) 0.0590 (1.50) 0.1181 (3.00) 0.1024 (2.60) 1 3 4 5 0.0748 (1.90) bsc 0.0374 (0.95) bsc 2


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